zzh
b50360bb48
整合了ert seeding，结果正确，完善了shm
2024-08-06 03:08:10 +08:00
zzh
364ee9756e
添加了共享内存支持，成功构建ert索引
2024-08-03 17:26:32 +08:00
zzh
9c9502d584
clean代码，结果正确
2024-07-26 04:15:55 +08:00
zzh
8c2a90e3e2
修改了双线程解压读写fastq.gz的bug，修改了一些测试代码
2024-06-24 18:11:54 +08:00
zzh
d1a5715e56
将fputs改成fwrite，写入效率提升30%
2024-04-06 20:53:42 +08:00
zzh
d41c038616
清理一些fprintf
2024-04-06 16:08:43 +08:00
zzh
3e20d7ee0f
解决了创建bwt索引时，一同创建fmt相关的索引相关的bug，现在可以正常一起创建索引了，接下来还可以将sa和bytesa一起创建来减小时间
2024-04-06 15:05:20 +08:00
zzh
dd7db7beb6
修改一下索引文件后缀名称
2024-04-02 07:50:22 +08:00
zzh
123aceb6a6
将fmt和kmer合并到建索引的过程中
2024-04-02 07:49:38 +08:00
zzh
20e072f6af
所有代码都合并了，还差一点建立索引的时候，一起都建立了
2024-04-02 07:42:37 +08:00
zzh
dd03596997
加入了获取reads和extension数据的代码
2024-03-27 23:47:39 +08:00
zzh
1e3965cb7d
添加了可同时读写的pipeline，优化了时间统计
2024-03-24 04:40:09 +08:00
zzh
d728ddbe2c
解决了bsw上边界同样的问题，解决了seed3的一个bug
2024-03-23 03:23:05 +08:00
zzh
2eaeb26858
添加了直接扩展两个碱基的函数
2024-03-14 15:32:34 +08:00
zzh
856a0e0c01
改成了batch模式，对na12878有效果
2024-03-09 11:39:40 +08:00
zzh
7d085962a2
开始改成sbwa那种batch模式
2024-03-07 18:23:21 +08:00
6e1dd08fb6
将seed和extend部分修改成了batch模式，好像没啥效果
2024-02-23 01:09:08 +08:00
04745dd1a8
忽略sam文件
2024-02-22 01:32:18 +08:00
4bd0fd4f91
做了一些代码清理，目前结果应该是完全一致的
2024-02-22 01:26:57 +08:00
17618ee5f2
解决了sa的bug，现在结果和原版一模一样
2024-02-21 15:21:56 +08:00
fc2e0d9b0b
实现了seed过程的所有加速想法，seed部分实现了3倍左右加速比
2024-02-20 01:12:02 +08:00
4a1c2cd3db
修改一些注释疏忽的问题
2024-02-16 21:23:55 +08:00
7dceae8c5d
seed三个步骤，全部用fmt实现，而且结果一致
2024-02-16 20:59:59 +08:00
9d45fd02fb
添加了bit过滤，解决了一些bug，现在seed1和seed2都没问题了
2024-02-16 00:18:14 +08:00
5d8ace386f
seed1和seed2结果都正确
2024-02-13 13:37:07 +08:00
d41b8da061
kmer长度变为14，结果正确
2024-02-12 20:54:57 +08:00
463f7da138
将smem1函数用fmt结构实现了，结果基本正确
2024-02-07 22:08:51 +08:00
zzh
bf678f4dae
实现了用33bit表示sa，间隔为4，释放内存的时候会崩溃
2023-12-27 10:42:12 +08:00
zzh
c981585fd2
添加了运行时间计算代码，用来分析性能
2023-12-25 13:58:15 +08:00
zzh
293f3bb80e
添加了fmt_idx文件，开始改进seed过程
2023-12-25 11:11:19 +08:00
zzh
d636907248
第一次merge
2023-12-24 17:25:55 +08:00
zzh
44fe799773
添加了一些注释
2023-12-24 17:23:14 +08:00
zzh
7807c96882
Initial commit
2023-12-24 17:21:30 +08:00
e000ecbf45
Merge pull request #367 from martin-g/github-actions-linux-aarch64
...
Add CI job for Ubuntu 20.04 aarch64
2022-09-22 19:52:12 -04:00
370bd3ca25
Add CI job for Ubuntu 20.04 aarch64
...
Signed-off-by: Martin Tzvetanov Grigorov <mgrigorov@apache.org>
2022-09-01 10:11:22 +03:00
f89e937d34
Merge pull request #359 from jmarshall/neon
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Add ARM Neon and scalar implementations of SIMD functions
2022-08-31 09:50:31 -04:00
aeff0eed7a
Use native SSE2 intrinsics on i386 as well as x86-64
...
Make the native SSE2 code conditional on __SSE2__, which is defined
by GCC/Clang/etc on x86-64 by default and on i386 with -msse2 etc.
2022-06-27 14:15:59 +01:00
50f99b6890
On other platforms, emulate SSE2 SIMD calls using scalar code
2022-06-26 19:38:20 +01:00
b64ccddda7
On ARM, rewrite SSE2 SIMD calls using Neon intrinsics
...
Many Intel intrinsics have a corresponding Neon equivalent.
Other cases are more interesting:
* Neon's vmaxvq directly selects the maximum entry in a vector,
so can be used to implement both the __max_16/__max_8 macros
and the _mm_movemask_epi8 early loop exit. Introduce additional
helper macros alongside __max_16/__max_8 so that the early loop
exit can similarly be implemented differently on the two platforms.
* Full-width shifts can be done via vextq. This is defined close to
the ksw_u8()/ksw_i16() functions (rather than in neon_sse.h) as it
implicitly uses one of their local variables.
* ksw_i16() uses saturating *signed* 16-bit operations apart from
_mm_subs_epu16; presumably the data is effectively still signed but
we wish to keep it non-negative. The ARM intrinsics are more careful
about type checking, so this requires an extra U16() helper macro.
2022-06-20 20:43:17 +01:00
b5f4bdae91
Make _mm_load_si128() explicit
...
The previous code implicitly caused a load; change it so the load
intrinsic is explicitly invoked, as the others are. (This in fact
makes no difference to the generated code.)
2022-06-17 18:42:07 +01:00
0028f086d8
Merge pull request #355 from clintval/cv_document_new_XB
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Document that the XB tag now contains the mapping quality too
2022-06-03 15:01:14 -04:00
c7c2e6ddf7
Document that the XB tag now contains the mapping quality too
2022-05-19 13:43:22 -04:00
8fdc96b5cf
Merge pull request #263 from jmarshall/std-vars
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Makefile: Use $CPPFLAGS and $LDFLAGS if they are set
2022-03-07 09:50:23 -05:00
be36d981cd
Use $CPPFLAGS and $LDFLAGS if they are set
...
The bwa makefile doesn't set these two itself, but the environment
or make command line might set any of CC/CPPFLAGS/CFLAGS/LDFLAGS/LIBS.
Use $(CPPFLAGS) when compiling and $(LDFLAGS) when linking so they can
be used to customise the build. Remove $(DFLAGS) from link commands as
these preprocessor options are irrelevant for linking.
2022-03-07 10:59:42 +00:00
59cac0131a
Merge branch 'fulcrumgenomics-feature/add-xa-drop-ratio-option'
2022-03-06 18:22:02 -05:00
49c397d16e
Merge branch 'feature/add-xa-drop-ratio-option' of https://github.com/fulcrumgenomics/bwa into fulcrumgenomics-feature/add-xa-drop-ratio-option
2022-03-06 18:21:49 -05:00
5d250d35de
Merge pull request #293 from nh13/patch-2
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Output mapping quality with XB
2022-03-06 18:18:45 -05:00
e679702118
Merge pull request #292 from nh13/patch-1
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Document "-u"
2022-03-06 18:16:09 -05:00
4d8fb2ca91
Merge pull request #297 from nh13/patch-3
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Clarify bwa mem -5 option
2022-03-06 18:12:09 -05:00
d26eb2d288
Merge pull request #330 from nh13/patch-4
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Add the mate mapping quality tag
2022-03-06 18:07:01 -05:00
zzh
zzh
Heng Li
Martin Tzvetanov Grigorov
John Marshall
clintval
John Marshall
Heng Li